ATP Electronics Announces New Industrial e.MMC Product Series – Flash Memory Summit 2018 Update

ATP Electronics is present at Flash Memory Summit 2018, and they are announcing their new lineup of industrial e.MMC devices that provide uncompromising reliability, maximum endurance and high performance.  The new ATP industrial e.MMC adheres to JEDEC e.MMC v5.1 Standard (JESD84-B51), and is ideal for handling big data, yet with a small footprint, ample capacity and low power consumption.

Featuring 3D NAND flash, and available in capacities up to 128GB, ATP’s e.MMC has an industrial operating temperature range of -40°C to +85°C, providing exceptional thermal tolerance even in extreme environments.  It is constructed in a 153-ball fine pitch ball grid array (FBGA) package that features a MultiMedia Card (MMC) interface, with integrated NAND flash memory and controller in a single chip that is smaller than a typical postage stamp.  This allows basic functions such as wear leveling, error correction and bad block management to be managed internally.  This frees the host from having to perform these low-level flash-related operations.  Soldering the e.MMC directly to the printed circuit board makes it resistant to vibration, enhancing reliabililty even when being subjected to grueling operations.

According to Marco Mezger, Vice President of Global Marketing for ATP, “This year’s FMS theme, ‘Designing for Big Data Demands’ encapsulates ATP’s goal to provide the most viable solutions for the tough requirements of diverse industrial applications.  We are very proud to introduce the new industrial e.MMC, which achieves unprecedented reliability and 2-3X the endurance of standard e.MMC solutions, thanks to the superior IC NAND flash characterization as well as intense testing and validation that ATP has always been known for.”

The e.MMC v5.1 standard enables new features including:

  • Command Queuing and Cache Barrier – enhances read/write performance
  • Enhanced Strobe in HS400 Mode – allows for faster synchronization between the host and the e.MMC device
  • Cache Flushing Report – ensures data integrity in cache blocks
  • Secure Write Protection – ensures that only authorized/entrusted parties can protect or unprotect the e.MMC device
  • M.A.R.T. (Self-Monitoring, Analysis, and Reporting Technology) – monitors reliability and endurance attributes to monitor device health and determine remaining lifespan to enable replacement planning

To ensure top levels of performance, endurance and reliability, as well as device lifespan, ATP’s e.MMC utilizes intelligent solutions such as Advance Global Wear Leveling and SSD-level low-density parity check error correction code (LDPC ECC) technology to increase endurance.  Dynamic Data Refresh and AutoRefresh protect against read disturb errors, and SRAM soft error detector technology monitors error bit levels during operation of the device to ensure data integrity, and Early Retirement technology prevents weak blocks from causing data loss.

blankFor more information on ATP’s new industrial e.MMC, you can visit the product page here.  You can also visit with ATP at Flash Memory Summit 2018 in Santa Clara, California, which runs through today (August 9th).  They can be found in meeting room #205.

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