Japanese Research Team Develops Garbage Collection Middleware To Improve SSD Write Speeds By Up To 300%!

The Institute of Electrical and Electronics Engineers (IEEE) recently held its 2014 IEEE International Memory Workshop (IMW) from 5/18/2014 to 5/21/2014 in Taipei, Taiwan.  This workshop is an international academic conference on semiconductor memory technologies, and while much of the discussion is even more specialized than us technology buffs get into, the occasional significant development is featured.  Such was the case at this year’s workshop, as a Japanese research team has developed technology to dramatically improve the write speeds of solid state drives (SSDs).  This development also increases the power efficiency and life span of NAND flash memory used in SSDs.

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The research team is led by Ken Takeuchi, a professor at Tokyo’s Chuo University and its Department of Electrical, Electronic and Communications Engineering.  The title of the thesis presented at the 2014 IEEE workshop is “NAND Flash Aware Data Management System for High-Speed SSDs by Garbage Collection Overhead Suppression.”  When utilizing NAND flash memory, it is not possible to simply overwrite data on the same memory area, as garbage collection can only erase entire blocks of data, and not individual pages.  This makes it necessary to write data to a new page, and then invalidate the old area (which will eventually be erased and made available for reuse).  As a result of this, data is fragmented across multiple pages and blocks, increasing the invalid (unavailable until garbage collection completes) area and decreasing the remaining available storage capacity.

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The smaller the SSD capacity, the more significant this problem can quickly become.  When NAND flash carries out the garbage collection routine, fragmented data is rearranged in a continuous method and the invalid blocks are then erased and returned to the available flash pool for reuse.  This process can take up to 100ms (or longer), which dramatically decreases the write speed of an SSD as it waits for garbage collection to play “catch-up” to free up additional blocks of NAND to write to.  This is also often referred to as “write amplification”.

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In an effort to address this issue, the research team in September of last year developed a method that made improvements to the “middleware” that controls storage for database applications.  There are generally two levels of “middleware” — SE (storage engine) middleware, that assigns the logical addresses when application software accesses the storage device; and FTL (flash translation layer) middleware, that converts those logical addresses into physical addresses on the SSD controller side.  This time around, the team developed a more versatile method that gets the two levels of “middleware” to work in conjunction.

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The research team’s new method forms a new middleware layer called “LBA (logical block address) scrambler” that resides between the file system (OS) and the FTL (flash translation layer).  This LBA scrambler layer works in concert with the FTL, converting the logical addresses of data being written to physical addresses, effectively reducing fragmentation across multiple pages.  Instead of writing data onto a new blank page, the data is written to a page that is already fragmented in a block that is scheduled to be erased next.  This results in an increase in the ratio of invalid pages within the one block that is to be erased next, rather than being spread over different pages in different blocks that will each have to wait its turn for erasure.  This also reduces the number of valid pages that need to be copied to another area as the garbage collection routine takes place.

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In their simulations, the research team was able to confirm that their new “LBA scrambler” middleware improved the write speeds of SSDs by up to 300%!  A side effect of this process is to reduce power consumption by up to 60%, and to reduce the number of write/erase cycles required by up to 55%.  These reductions will also result in increased product life of the NAND flash memory in use.  With this new method, no changes to the NAND flash memory itself are required as the changes are all accomplished within the new middleware.  This means that it could be applied to existing SSDs in a wide variety of usage applications.