Even if you complain to me, I can not even how to.
Simply, the features of this product is so.

>I.The SSD of easily customizable new structure the speed and capacity

So is asic based solition. You make a base configuration and fuse off features that are not needed. You dont need fpga for that

>II.First, put the target for video devices, and medical devices,etc.

I wouldnt put fpga based device with 52 independed emmc controllers in a medical device. Or any envirment, that needs high reliability. Remember, the more controllers you have, the bigger the risk of faulire (think of it as raid0).

>III.Was disassembled the Fixstars SSD-3000M. It will be 52 pieces equipped with eMMC chip of 64G bytes

So, it has some redundancy afterall. But question is, how does it work (can it sustain a failed emmc chip ?)

>IV. eMMC is equipped with a controller to manage the flash memory to itself. And SSD controller is not required.
Instead, read and write eMMC data using a FPGA, which exchanges with the external interface.

Which is never a good approach for a high performance device. eMMC is designed for emmbended devices such as mobile phones or other portable devices, not for ssds, where there will be lots of random data. Remember, emmc controllers are very simplictic (no dram, very simple wearlevelling and garabage collection algorithms) and are not designed for random envirment.
And having 52 of them means, that you have 52 controllers managing only one chip instead of one main chip controlling 52 packages. This has buch of downsides, one of them being inefficient wearlevelling (since every eemc controller is only aware of its own nand chip and nothing else)..

It is certainly troublesome, but browsing of information should be.
It has been almost written in such a feeling.

I.The SSD of easily customizable new structure the speed and capacity

II.First, put the target for video devices, and medical devices,etc.

III.Was disassembled the Fixstars SSD-3000M. It will be 52 pieces equipped with eMMC chip of 64G bytes

IV. eMMC is equipped with a controller to manage the flash memory to itself. And SSD controller is not required.
Instead, read and write eMMC data using a FPGA, which exchanges with the external interface.

V.This has two advantages.
One is that the stable speed exits.
In order to manage the flash memory chips are dispersed at the eMMC, the speed of reading or writing is stabilized as a whole.

Another, that you can easily change the capacity and read and write speed.
Number of mounting the eMMC, and by increasing or decreasing the communication channel connecting eMMC and FPGA, it is possible to change the size and speed.

VI.Customer needs (I want you to to 8 channels in order to ensure the speed, I want you to to less expensive because sufficient 3 channel, etc.) can be easily realized.

They rather than sell what their have made, to make those customers covet, I am feeling.

(I am not good native English, please forgive Where difficult to read.)

yeah, i have a hard time understanding brokem english, that comes from google translate.

Ok. And that you have not read the article, you is I know that do not understand this product.