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Techman SSD XC100 Series NVMe SSD Review (3.2TB)

High capacity and high-performance SSDs are starting to pop up every which way in the enterprise segment and competition is getting heated. Thanks to PMC with their latest Flashtec NVMe controllers, third party SSD vendors are able to develop these high capacity, high performance devices faster than ever with features catered to their target buyers. Techman SSD, a new company, is one of the latest SSD manufacturers to jump in the game and has decided to go big or go home by utilizing PMC’s 16-channel Flashtec NVMe controller for their XC100 SSD.

Reading through their marketing material it seems like they understand exactly what the enterprise segment demands. Designed and built for cloud high speed computing, big data analysis, financial/academic research, OLTP, and IoT applications, the XC100 comes in capacities up to 3.2TB and can deliver impressive sequential speeds of up to 3.2GB/s and random 4KB speeds of up to 750K IOPS. Although this is impressive in its own right, it isn’t all about jaw dropping specification numbers alone, Techman stresses the importance of performance consistency, data integrity, and security as well.

The Techman XC100 SSDs seem to be a solid offering on paper with high performance and a robust feature set, but how well will it fair against the competition when we put it to the test in today’s review? Read on and find out!

Techman SSD XC100 3.2TB Main

SPECIFICATIONS, PRICING, AND AVAILABILITY

The Techman SSD XC100 is a NVMe PCIe 3.0 x4 SSD that comes in both HHHL Add-in Card and U.2 SFF 2.5″ form factors as well as options for both cMLC or eMLC depending on your application needs. For today’s review we are specifically testing the 3.2TB XC100E5C model which is a HHHL AIC that utilizes 15nm eMLC from Toshiba. For their other models’ performance and specification figures check out their website at tm-ssd.com. Below are the stats for our review sample model.

Techman SSD XC100E5C
Capacity800GB1.6TB3.2TB
Sequential Read (MB/s)2,7003,2003,200
Sequential Write (MB/s)7701,4001,400
4K Random Read (IOPS)580K750K750K
4K Random Write (IOPS)55K115K115K
Mixed IOPS (70/30 R/W, random 4K)140K250K250K
8K Random Read (IOPS)310K380K380K
8K Random Write (IOPS)27K55K55K
Mixed IOPS (70/30 R/W, random 4K)71K130K130K
Endurance (DWPD)/(PBW)7/10.227/20.447/40.88

Through the PCIe 3.0 x4 connection and NVMe 1.1b protocol, the XC100 SSD is capable of sequential speeds of 3.2GB/s for reads and 1.4GB/s for writes. In terms of random performance, its spec sheet shows it to be quite impressive, with 4K reads of 750K IOPS and writes of 115K. The endurance figure for this SSD is seven drive writes per day, or for our review sample, 40.88TB lifetime writes over the course of its 5-year warranty. The cMLC models are rated for a bit less than their eMLC bothers at just three DWPD.  In addition, the UBER rating for this SSD is less than 1 sector per 10^17 bits read and the MTBF rating is 1,200,000 hours.

The Techman SSDs support standard NVMe drivers, with support in both Windows and Linux environments. They also have a driver you can download from their website. For specific operating system support, the list is as follows for Windows: Windows Server 2008 / 2012 R2 / 2016, Windows 7, Windows 8.1, Windows 10. As for Linux, it is as follows: RHEL 6/7, SUSE 11/12, CentOS 6/7, Ubuntu Server 12/14/15, Debian 7/8, VMWare 5.5/6.0, XenServer 6.5. Furthermore, UEFI version 2.3.1 and up is needed for this product and it is bootable.

Techman SSD XC100 3.2TB Front

As for features, the XC100 is jam packed with them. There are the basics: S.M.A.R.T / Health Information, TRIM support, wear-leveling, bad block management, and background garbage collection.

There is also end-to-end data protection ensures that the data placed on the SSD maintains its integrity. The XC100 utilizes BCH ECC with 4176 bytes of data and 200 bytes of parity data as well as flash based RAID protection that is similar to a RAID-5. Additionally, to provide power-loss protection a bank of capacitors ensures there is no data loss once an ungraceful shutdown occurs.

Thermal throttle protection will limit performance once the device reaches certain temperatures and has three thresholds. The first will throttle write performance to 15% and read performance to 50% if it reaches 75C. If it reaches 80C it will throttle to just 5% write performance and 40% read. Finally, it will freeze all IO if the final threshold of 85C is reached.  The U.2 variants have a 10C higher temperature buffer for each of these thresholds.

Techman also offers Advanced Encryption Standard (AES) 256bit support as an option for those who need additional security. The XC100 also features FW protection which backs up several FW copies in case the main slot is damaged. Finally, there is a pseudo SLC mode in which the MLC NAND is configured into pSLC to help extend the lifespan of the NAND.

A CLOSER LOOK

Just as many other HHHL AIC SSDs the heat sink covers nearly all the top of the PCB, however, there is a daughter board attached as well. Once disassembled we can see that the daughter board is jam packed with capacitors to provide power in case of an unexpected power-loss. Also, we can see that they have opted to put thermal pads on each of the main component chips to help better distribute heat into the heats sink.

Techman SSD XC100 3.2TB Back Techman SSD XC100 3.2TB Disassembled

Overall, we can see there are 32 NAND packages on the PCB, 16 on each side. As we mentioned earlier, the NAND being utilized is by 15nm eMLC by Toshiba. In addition, there are nine DRAM packages by NANYA in an ECC arrangement to provide for a XOR data protection on the cache.

The NVMe controller is by PMC and is the same one utilized in the HGST SN100 we recently reviewed. It has a 16-core architecture to allow parallel commands and threads form the host to be processed extremely fast. Some cores even have specific manager functions such as one being a boot processor core with ROM manager.  This controller also utilizes 16 channels for NAND flash control, which provides for it to coordinate and distribute read, program, and erase commands efficiently.

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